Resistive Random Access Memory (RRAM) is a non-volatile memory in which a dielectric that is normally insulating, is configured to conduct after application of a sufficiently high voltage. The forming of a conduction path typically requires a relatively high voltage. Once the path is formed in the dielectric, the path may be “reset” (broken, to provide high resistance) or “set” (re-formed, to provide a low resistance) by an appropriately applied voltage.
Cell distributions require a sufficient gap (read window) between different cell states to enable an accurate reading. Cell distributions are described in terms of cell resistance.
FIG. 5 is a graph 500 of number of cells versus cell resistance, that is, a number of occurrences leading to a cell distribution of cells showing a value “1” and cells showing a value “0”. Changing a memory cell from one state to the other across the read window and its borders is called “set” (to a logical “1”) or “reset” (to a logical “0”).
FIG. 6 is a conventional circuit 600. The simplest way to observe a value of an RRAM cell Rcell is to couple a constant current supply Iconst and detect a voltage drop. This is realized by an additional transistor NMOS coupled in series with the RRAM cell Rcell, and a comparator Comp configured to generate a stop signal when the read window border, shown in FIG. 5, is crossed. The necessary power Pcell for changing the resistor value is adjusted by a constant current Iconst. The transistor bias voltage Vbias and the constant current Iconst are linked via the transistor characteristic in saturation mode.
With the circuit 600, an RRAM cell state can be shifted across the lower read window border A during “set” with sufficient power. On the other hand, an RRAM cell Rcell in very low resistive state, that is, well below the lower read window border A, does not receive enough power to be returned to the other state during “reset”. This is due to a small diffusion coefficient. Even with other constant current Iconst settings, which are equal to bias voltage Vbias settings, the characteristics show a low power region for low RRAM cell resistances.